Generic Codesign and Synthesis Introduction

Reactive engineering systems are systems which continuously interact with their environment, usually requiring real-time control. Concurrent behaviour is usually also implied. Examples of such systems are industrial manufacturing processes, power generation plants and vehicle control and power systems. Controllers for reactive systems are increasingly being implemented as a heterogeneous mix of software and mechanical, electrical and electronic hardware. The boundaries between these parts are often flexible, and are subject to design trade-off decisions [1]. For example, the boundary between software and electronic hardware is becoming blurred with the advent of field-programmable logic devices which are reprogrammable during use. The partitioning of the system into hardware, software and programmable components is a critical part of the design process, and affects all aspects of the design, including cost, effort, maintainability and flexibility to changes in specification. Codesign is the process of specifying and modelling a complete system before it is partitioned and committed to a style of implementation.

The specification stage which was studied in the first phase of this project (N5) was concerned with capturing the requirements of the customer in a formalized way. The formalism used, state charts [2] in this case, does not constrain any part of the system as far as implementation is concerned. The hierarchy within the model is entirely abstract, and must be mapped to a physical partitioning scheme. The next phase in a design would be the decomposition of the design into parts, each of which must be assigned to a particular implementation technology. The codesign process attempts to obtain a solution which gives the optimal cost and performance for the application. This proposal is therefore a logical continuation of the Generic Specification project to the next stage of the design process.

Background

The design process is illustrated in figure 1, starting with the informal user requirement which is translated to the formal generic specification. For example, a textual description produced by a customer may be used to construct a state chart. The state chart is unambiguous and permits correctness and completeness to be checked by using a tool such as Statemate. After verification tests are performed at this level, partitioning is performed to assign parts of the system to appropriate implementation styles. The specification may be translated into a lower-level intermediate format such as CFSM (Codesign Finite State Machines) [3] at this stage. Software and hardware synthesis steps are then performed to translate the elements of the system directly into executable program code or hardware description languages (HDLs). The HDL code can drive CAD and CAE systems to produce the required engineering diagrams and direct input to automated manufacturing plant.

The partitioning process aims to obtain a solution which is optimal in some sense. This is achieved by describing the specification at a high level of abstraction and hence delaying the assignment to a particular implementation. In many cases, software is the preferred option since it retains a high degree of flexibility in case of specification changes. Hardware is generally preferred only where performance requires it. There is, however, a grey area in which alternatives may exist and the choice must be made on the basis of overall cost or other factors.

There are many commercial and social benefits to be gained from a generic codesign system. The design automation process reduces the time-to-market, enhancing competitiveness. The design is more likely to be correct, leading to lower prototyping and maintenance costs. The safety of the system will be improved, which is especially important in hazardous situations where regulatory requirements are strict, such as the nuclear industry.

Aims and Objectives

The overall aim is to develop a methodology for the design and partitioning of heterogeneous engineering systems and the associated CAD tools required. Experience gained from current work in the EDC and discussion with its industrial partners indicate that formal methods are not generally used in engineering projects, though it is acknowledged that they would bring many benefits. One reason is the need for a more familiar interface to the specification tools and this is currently being investigated in project N5. Another reason is the gap between the specification and the implementation which is currently only filled by tools which tend to target one or two specific areas, i.e. software and digital logic Ics. The aim of this proposal is to demonstrate the use of codesign and cosynthesis tools to determine an appropriate implementation using a heterogeneous mixture from a wider range of technologies.

The main objectives will be to :-

Investigate the partitioning problems in systems used by EDC partners and evaluate current CAD tools in the area of codesign and cosynthesis.

Produce a methodology using existing and/or custom CAD tools which assists the designer in the partitioning process and links it to implementation tools.

Demonstrate the techniques by application to industrially-linked case studies, following the flow of the design process from specification to implementation.

Codesign of Heterogeneous systems

The term "codesign" is generally synonymous with digital systems which contain embedded software. In a wider engineering context, the hardware may include power electrical, hydraulic or pneumatic devices or mechanical interlocks. The choice of implementation in such a system is based not only on cost, speed and size, but must take into account safety, reliability, resistance to external influences and more. The trade-offs made in the partitioning process must achieve a solution which meets these multiple constraints. In a safety-critical system, it is desirable to implement certain parts of the system in a fail-safe or redundant way. It is difficult to capture this information at the specification stage, where normal functionality is described. Failure modes and redundancy are details of the implementation which should perhaps be reserved until the partitioning stage. Some high-level information about the criticality of particular control paths or assertions may allow a degree of automation in synthesizing an appropriate configuration of hardware to meet the safety criteria.

 

For example, regulations do not permit a semiconductor switch to be used for safety isolation of an electrical circuit, so that a paticular design may be constrained to the use of electromechanical switching in tandem or in place of a transistor in such situations. In other cases, the choice between relay logic, hard-wired transistor logic, PLC (computer) control may be determined so as to satisfy an overall constraint on MTBF, or other statistical failure criterion.

Redundancy is a means of improving reliability, whether by duplication, triplication etc. or by employing a diversity of technologies. The high-level generic specification must at present model the redundant parts of the system explicitly, which may obscure the functional aspects of the system. A codesign system will allow reliability information to be captured at a higher level of abstraction, by attributes attached to the functional specification. This would then guide the partitioning and synthesis tools to produce a design with the required level of safety, reliability and performance.

 

Once a design has been analysed, the designer will be able to explore alternative partitions and implementations, a necessary facility since the optimisation stage is expected to be imperfect until sufficient experience is available to fine-tune it.

 

References

[ 1] P.A. Subrahmanyam, "Hardware-Software Co-Design: Cautious optimism for the future.", IEEE Computer, January 1993, p84

[ 2] D. Harel, et al.,"On the Formal Semantics of State Charts", Logic and Computer Science, 1986

[ 3] M. Chiodo, P Giusto, A. Jurecska, H. Hsieh, A. Sangiovanni-Vincentelli and L. Lavagno, "Hardware-Software Codesign of Embedded Systems", IEEE Micro, August 1994, p.26